EMT 250 Instructions

David Morrin

2022-12-18

These are unofficial instructions. Some of the naming is taken from terms in the schematic, but mostly they were just made up on the spot.

ALU functions

The ALU has two inputs A and B. Input A can be almost any data source other than register B. Input B is always register B.

Mnemonic	Bit map (31:24, 23:16, 15:8, 7:0)	Function
aX	`0------- -------- -------- aa------`	Use register A, address X (aa) as input A
(I/O see below)	`1------- -------- -----bbb aa------`	Use source aa (bbb for I/O) as input A
SH	`-------- a------- -------- --------`	a=1 to shift the bits around (see details in text)
INC	`---000-- -1--aa-- -------- --------`	Increment B register aa
SUB	`---001-- -1--aa-- -------- --------`	Subtract: B input aa minus A input
ADD	`---010-- -0--aa-- -------- --------`	Add: B register aa plus input A
NOT	`---011-- -------- -------- --------`	Bitwise negation of input A
XOR	`---100-- ----aa-- -------- --------`	Exclusive OR: B register aa \(\oplus\) input A
TA	`---101-- -------- -------- --------`	Transfer input A
TB	`---000-- -0--aa-- -------- --------`	Transfer B register aa
AND	`---110-- ----aa-- -------- --------`	Logical: B register aa \(\cdot\) input A
DBL	`---111-- -0--aa-- -------- --------`	Doubles B register: B reg aa plus B reg aa

Memory

Mnemonic	Bit map (31:24, 23:16, 15:8, 7:0)	Function
LaX	`-aa----- --1----- -----ccc --bb----`	Store source aa (ccc for I/O) to A register bb [SA]
LbX	`-------- ---1--aa -------- --------`	Store ALU output to B register aa [S]
MBR	`------10 -------- -------- --------`	Load memory buffer register with ALU output
MAR	`------11 -------- -------- --------`	Load memory address register with ALU output
SP	`------01 -------- ----1-10 --------`	Store product (write ALU result to multiplier RAM)

Mnemonic	Bit map (31:24, 23:16, 15:8, 7:0)	Function
IMM	`-00----- -------- aaaaaaaa aaaaaaaa`	Immediate
ALU	`-01----- -------- -------- --------`	ALU output
MM	`-10----- -------- -----000 ------aa`	Multiplier memory aa
CTL	`-10----- -------- -----001 --------`	Panel controls (3 levers and program buttons)
ROT	`-10----- -------- -----010 --------`	Rotates latch A
NOI	`-10----- -------- -----011 --------`	Scrambles latch A for noise generation
AD1	`-10----- -------- -----100 --------`	A/D delay line #1
AD2	`-10----- -------- -----101 --------`	A/D delay line #2
AD3	`-10----- -------- -----110 --------`	A/D delay line #3
PRD	`-10----- -------- -----111 --------`	Product register
MO	`-11----- -------- -------- --------`	Main memory output

Mnemonic	Bit map (31:24, 23:16, 15:8, 7:0)	Function
JMPI	`------01 -------- ----1001 --------`	Jump on interrupt. Clears interrupt.
JMP	`------01 -------- ----1011 --------`	Jump to ALU result.
ADC	`------01 -------- ----1110 --------`	Start A/D
DAC	`------01 -------- ----1100 --------`	Start D/A (resets D/A counters)
LDDA	`------01 -------- ----1000 --------`	Load D/A. There are 4; auto increment D/A [S]
MULI	`------01 -------- ---00--- aaaaaaaa`	Multiply ALU result times immediate
MULM	`------01 -------- ---10--- ----aaaa`	Multiply ALU result times multiplier memory address aaaa

Mnemonic	Bit map (31:24, 23:16, 15:8, 7:0)	Function
(no skip)	`-------- -------- 000----- --------`	No skip, default behavior
SKN	`-------- -------- 001----- --------`	Skip on negative
SKC	`-------- -------- 010----- --------`	Skip on carry
SKP	`-------- -------- 011----- --------`	Skip on positive
SKNO	`-------- -------- 100----- --------`	Skip on not-overflow
SKNON	`-------- -------- 101----- --------`	Skip on not-overflow or negative
SKNOP	`-------- -------- 110----- --------`	Skip on not-overflow or positive
SKA	`-------- -------- 111----- --------`	Skip always